The electrical interconnection between printed circuit boards in electronic equipment contributes significantly to the price of the equipment. Thus, there has been widespread effort to increase the interconnection density of printed circuit boards and thus decrease their size and the associated system cost. In one configuration employed to increase interconnection density, printed circuit patterns are placed on both major surfaces of a substrate such as a glass reinforced epoxy substrate. Electrical interconnections between points in the two patterns are made by drilling through the substrate and metallizing the hole. This configuration significantly increases the capacity of one printed circuit board. However, the holes drilled for interconnection are large, e.g., approximately 0.015 to 0.045 inches. Since the holes are larger than the typical width of a pattern section, generally 0.005 to 0.015 inches, they extend beyond the limits of a pattern line. Adjacent pattern lines must be deflected to avoid short circuits with the enlarged metallized portion surrounding the interconnection hole. Thus, the holes occupy a significant area and therefore increase the size of the printed circuit. In addition, these holes necessitate an increased complexity in the design of the printed circuit board pattern.
Multiple level pattern configurations have also been employed to further increase the capacity of printed circuit boards. In one such configuration, printed circuit board patterns are formed on both major surfaces of two or more separate substrates (C-stages). An adhesive bonding layer, for example, an epoxy impregnated glass cloth (B-stage) is sandwiched between two or more substrates each having their associated copper patterns on both major surfaces. The multilevel configuration is completed by sandwiching the two C-stages and the intermediate B-stage between external layers which include a copper foil and an additional C-stage layer, with their associated B-stage adhesive layers. The entire structure is pressed together at an elevated temperature. The pressure and elevated temperature cures the B-stage resin and produces a monolithic structure. By appropriately configuring the copper patterns on the outer copper foil layer and by appropriately aligning the resin-encapsulated inner pattern on each substrate, electrical interconnection between the patterns on different substrates is possible by drilling holes completely through the structure and metallizing the holes. However, there are significant difficulties associated with aligning the appropriate sections of the patterns on each substrate so that a suitable electrical interconnection is made. Additionally, in this multiple level configuration, electrical contact between patterns on the same substrate are made as described previously in the two-sided printed circuit board. Thus, the problems encountered with two-sided printed circuit boards, e.g., large holes producing increased size and pattern complexity are also inherent in this multiple level board. Further, since an interconnection hole is drilled through the entire structure an interconnection between two patterns induces a hole with its associated complications in all the circuit layers.
A multiple level circuit board has been developed that does not require the physical alignment of two independent substrates. In forming this structure, a copper layer is deposited on a carrier. A photoresist is applied to the copper layer and imaged in the desired pattern so that the copper areas of the underlying layer forming the desired pattern are covered and the remainder of the copper layer is exposed. The exposed copper is removed by etching and the photoresist is then removed leaving copper in the desired circuit pattern on the carrier. A new photoresist layer is deposited and delineated so that holes in the resist are opened where connections between pattern levels are to be made. A blanket layer of copper is then evaporated onto the substrate over the resist and thus as a consequence, onto the exposed regions of the copper pattern. The photoresist is then removed together with any overlying copper to leave a pattern with interconnection studs formed by the evaporated Cu. Polyimide resin is then deposited onto the copper. The top of the polyimide is abraded to expose the copper interconnection studs. A photoresist is deposited onto the polyimide and suitably delineated to leave exposed areas of the polyimide where a second level copper pattern is to be formed. (This pattern includes the copper studs which are used as interconnection between the pattern levels.) A second copper layer is then deposited on the exposed polyimide and copper studs and the photoresist is removed leading to an interconnected two layer configuration. The steps are repeated to produce successive patterned layers. That is, photolithography is again done by conventional techniques to delineate the desired interconnection openings, copper is evaporated onto the resist, the resist is removed, a second layer of polyimide is deposited, the surface of the polyimide is abraded to expose the copper, photolithography is employed to delineate the next pattern layer and copper is deposited onto the resist. As can be seen from the accompanying description, a large number of processing steps are involved. Thus, a high-density printed circuit board that is producible in a nominal number of steps was not yet available.
More recently a process, as shown in FIG. 1, has been developed which allows the manufacture of high-density multiple level printed circuit boards in a relatively small number of steps. In one embodiment, the process is begun with a conventional substrate 31, having a desired electrical conductor, e.g., copper 32, patterned thereon. An energy sensitive material 33, i.e., a material such as a polymer precursor, which upon exposure to appropriate electromagnetic radiation undergoes a modification, e.g., a chemical change such as cross-linking which in turn modifies the mechanical and/or chemical properites of the material, is deposited on the substate 31 with its conductor pattern 32 as shown in 1B. After its deposition, the energy sensitive material is patterned as shown in 1C. In a preferred embodiment the energy sensitive material 33 is then subjected to a blanket exposure of radiation, e.g., ultraviolet light, with an intensity significantly greater than that used for the initial pattern delineation. This second exposure further completes the desired modification. A conductor 34, e.g., copper, is deposited directly onto the resulting patterned insulating material 33. The copper 34 fills the voids 35 in the energy sensitive material formed during the previous patterning steps and thus contacts the initial copper pattern 32. Additionally, the copper forms a layer on the energy sensitive material 33. Thus, in one step a copper layer 34 is presented for production of a second suitable patterned copper layer 35 and interconnection between copper layers is provided. The desired pattern is formed in the newly deposited copper layers through conventional photolithography leading to configuration 1E.
The energy sensitive, delineable material is chosen so that after patterning an electrical conductor, e.g., copper, deposited there-upon, it has sufficient adherence to produce a durable bond. By depositing an electrical conductor directly and permanently onto the surface of the irradiated photosensitive material a number of previously required processing steps are eliminated. A suitable energy sensitive material is taught to be formed by combining (1) an acrylated epoxy resin; (2) a vinyl-terminated rubber, e.g., a copolymer of acrylonitrile and butadiene, which is, in turn, terminated with acrylic acid moieties; and (3) a suitable viscosity reducer, e.g., a monomer such as isobornyl acrylate or a solvent such as ethylene glycol.
If desired, further pattern levels with the associated connection between levels are built by repeating the above-described process, i.e., by sequentially depositing an appropriate energy sensitive material, delineating the material, if desired, blanket exposing the material, depositing the copper directly upon it and then forming the desired copper pattern. The use of the described processing steps in conjunction with an energy definable material to which copper adheres after patterning and which has sufficient dielectric strength and electrical resistivity to separate adjacent copper layers yields a multiple level, high-density printed circuit board that is produced with a relatively small number of processing steps. It is possible for typical coating thicknesses to produce interconnection holes, i.e., vias, as small as 0.004 inches without drilling holes through the entire structure. Thus, the size and complexity of the circuit board is not unnecessarily increased. It is also possible to produce multilevel circuit configurations on both sides of the previously described two-sided circuit board or, for example, on circuit boards based on flexible substrates. Additionally, the energy definable material is useful after irradiation as a final protective coating for the completed circuit board.
While the above-mentioned technique is advantageous, problems have been encountered in using the aforementioned energy sensitive material. We have discovered that these problems are primarily due to a certain degree of incompatibility between the acrylated epoxy resin and the vinyl terminated rubber which leads to separation of the product into two phases resulting in non-uniformity of the resultant film and imaging and curing problems. We have now discovered an energy sensitive material which, while based upon similar ingredients as the aforementioned material, results in a more compatible combination leading to substantially more uniform film composition and morphology utilizing the process described with respect to FIG. 1. The energy sensitive material, however, has other uses as well, e.g., in the production of solder masks.